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16 Mbit LPC Serial Flash
A Microchip Technology Company
SST49LF016C
Data Sheet
Clock
The LCLK pin accepts a clock input from the host controller.
Input/Output Communications
The LAD[3:0] pins are used to serially communicate cycle information such as cycle type, cycle direc-
tion, ID selection, address, data, and sync fields.
Input Communication Frame
The LFRAME# pin is used to indicate start of a LPC bus cycle. The pin is also used to abort an LPC
bus cycle in progress.
Reset
A V IL on INIT# or RST# pin initiates a device reset. INIT# and RST# pins have the same function inter-
nally. It is required to drive INIT# or RST# pins low during a system reset to ensure proper CPU initial-
ization. During a Read operation, driving INIT# or RST# pins low deselects the device and places the
output drivers, LAD[3:0], in a high impedance state. The reset signal must be held low for a minimum
of time T RSTP. A reset latency occurs if a reset procedure is performed during a Program or Erase oper-
ation. See Table 27, Reset Timing Parameters, for more information. A device reset during an active
Program or Erase operation will abort the operation and memory contents may become invalid due to
data being altered or corrupted from an incomplete Erase or Program operation.
Identification Inputs
These pins are part of a mechanism that allows multiple devices to be attached to the same bus. The
strapping of these pins is used to identify the component. The boot device must have ID[3:0] = 0; all
subsequent devices should use sequential count-up strapping. These pins are internally pulled-down
with a resistor between 20-100 K ? .
General Purpose Inputs
The General Purpose Inputs (GPI[4:0]) can be used as digital inputs for the CPU to read. The GPI reg-
ister holds the values on these pins. The data on the GPI pins must be stable before the start of a GPI
register Read and remain stable until the Read cycle is complete. The pins must be driven low, V IL , or
high, V IH but not left unconnected (float).
?2011 Silicon Storage Technology, Inc.
8
DS25029A
06/11
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